【分享】 在Vivado里关闭R5/GPU，降低Xilinx MPSoC的功耗

xsct% connect
tcfchan#2
xsct% target
  1  PS TAP
     2  PMU
     3  PL
  4  PSU
     5  RPU (Reset)
        6  Cortex-R5 #0 (No Power)
        7  Cortex-R5 #1 (No Power)
     8  APU
        9  Cortex-A53 #0 (Running)
       10  Cortex-A53 #1 (Power On Reset)
       11  Cortex-A53 #2 (No Power)
       12  Cortex-A53 #3 (No Power)

/*
 POWER DOWN REQUEST INTERRUPT ENABLE
/
/
 
 Register : REQ_PWRDWN_INT_EN @ 0XFFD80218
 
 Power-down Request Interrupt Enable for Dual_R5
 
 PSU_PMU_GLOBAL_REQ_PWRDWN_INT_EN_RPU 1
 
 Power-down Request Interrupt Enable for GPU PP0
 
 PSU_PMU_GLOBAL_REQ_PWRDWN_INT_EN_PP0 1
 
 Power-down Request Interrupt Enable for GPU PP1
 
 PSU_PMU_GLOBAL_REQ_PWRDWN_INT_EN_PP1 1
 
 Power-down Request Interrupt Enable for ACPU2
 
 PSU_PMU_GLOBAL_REQ_PWRDWN_INT_EN_ACPU2 1
 
 Power-down Request Interrupt Enable for ACPU3
 
 PSU_PMU_GLOBAL_REQ_PWRDWN_INT_EN_ACPU3 1
 
 Power-down Request Interrupt Enable Register. Writing a 1 to this locati
 
 on will unmask the Interrupt.
 
 (OFFSET, MASK, VALUE) (0XFFD80218, 0x0000043CU ,0x0000043CU)
/
PSU_Mask_Write(PMU_GLOBAL_REQ_PWRDWN_INT_EN_OFFSET,
0x0000043CU, 0x0000043CU);
/##################################################################### */
 
/*
 POWER DOWN TRIGGER
/
/
 
 Register : REQ_PWRDWN_TRIG @ 0XFFD80220
 
 Power-down Request Trigger for Dual_R5
 
 PSU_PMU_GLOBAL_REQ_PWRDWN_TRIG_RPU 1
 
 Power-down Request Trigger for GPU PP0
 
 PSU_PMU_GLOBAL_REQ_PWRDWN_TRIG_PP0 1
 
 Power-down Request Trigger for GPU PP1
 
 PSU_PMU_GLOBAL_REQ_PWRDWN_TRIG_PP1 1
 
 Power-down Request Trigger for ACPU2
 
 PSU_PMU_GLOBAL_REQ_PWRDWN_TRIG_ACPU2 1
 
 Power-down Request Trigger for ACPU3
 
 PSU_PMU_GLOBAL_REQ_PWRDWN_TRIG_ACPU3 1
 
 Power-down Request Trigger Register. Writing a 1 to this location will t
 
 rigger a power-down request to the PMU.
 
 (OFFSET, MASK, VALUE) (0XFFD80220, 0x0000043CU ,0x0000043CU)
/
PSU_Mask_Write(PMU_GLOBAL_REQ_PWRDWN_TRIG_OFFSET,
0x0000043CU, 0x0000043CU);
/##################################################################### */