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社区首页 >专栏 >Understanding RAM Timings

Understanding RAM Timings

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发布2022-05-13 19:34:41
发布2022-05-13 19:34:41
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文章被收录于专栏:ADAS性能优化ADAS性能优化
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RAM latency is CL-tRCD-tRP-tRAS-CMD latency. To understand them, bear in mind that the memory is internally organized as a matrix, where the data are stored at the intersection of the lines and columns.

  • CL: CAS Latency. The time it takes between a command having been sent to the memory and when it begins to reply to it. It is the time it takes between the processor asking for some data from the memory and then returning it.
  • tRCD: RAS to CAS Delay. The time it takes between the activation of the line (RAS) and the column (CAS) where the data are stored in the matrix.
  • tRP: RAS Precharge. The time it takes between disabling the access to a line of data and the beginning of the access to another line of data.
  • tRAS: Active to Precharge Delay. How long the memory has to wait until the next access to the memory can be initiated.
  • CMD: Command Rate. The time it takes between the memory chip having been activated and when the first command may be sent to the memory.

CAS Latency (CL) Impact on RAM Speed

As previously mentioned, CAS Latency (CL) is the best known memory parameter. It tells us how many clock cycles the memory will delay to return requested data. A memory with CL = 7 will delay seven clock cycles to deliver data, while a memory with CL = 9 will delay nine clock cycles to perform the same operation. Thus, for two memory modules running at the same clock rate, the one with the lowest CL will be faster.

Notice that the clock rate here is the real clock rate under which the memory module is running – i.e., half the rated clock rate. As DDR, DDR2, and DDR3 memories can deliver two data per clock cycle, they are rated with double their real clock rate.

In Figure 1, you can see how CL works. We gave two examples, a memory module with CL = 7 and a memory module with CL = 9. The command in blue would be a “read” command.

A memory with CL = 7 will provide a 22.2% improvement on memory latency over a memory with CL = 9, considering that both are running at the same clock rate.

You can even calculate the time the memory delays until it starts delivering data. The period of each clock cycle can be easily calculated through the formula:

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T = 1 / f

RAS to CAS Delay (tRCD) Impact on RAM Speed

Each memory chip is organized internally as a matrix. At the intersection of each row and column we have a small capacitor that is in charge of storing a “0” or a “1” – the data. Inside the memory, the process of accessing the stored data is accomplished by first activating the row then the column where it is located. This activation is done by two control signals called RAS (Row Address Strobe) and CAS (Column Address Strobe). The less time there is between these two signals the better, as the data will be read sooner. RAS to CAS Delay or tRCD measures this time. In Figure 2 we illustrate this, showing a memory with tRCD = 3.

As you can see, RAS to CAS Delay is also the number of clock cycles taken between the “Active” command and a “read” or “write” command.

As with CAS Latency, RAS to CAS Delay works with the memory real clock (which is half of the labeled clock). The lower this parameter, the faster the memory will be, as it will start reading or writing data earlier.

RAS Precharge (tRP) Impact on RAM Speed

After data is gathered from the memory, a command called Precharge needs to be issued, closing the memory row that was being used and allowing a new row to be activated. RAS Precharge time (tRP) is the time taken between when the Precharge command and the next Active command can be issued. As we learned from the previous page, the Active command starts a read or write cycle

we are giving an example of a memory with tRP = 3.

As with the other parameters, RAS Precharge works with the memory real clock (which is half of the labeled clock). The lower this parameter, the faster the memory will be, as it will issue the Active command earlier.

Adding everything we’ve seen, the time elapsed between issuing the Precharge command and actually getting the data will be tRP + tRCD + CL.

Other Parameters Impacting RAM Timings

Let’s take a better look at the other two parameters, Active to Precharge Delay (tRAS) and Command Rate (CMD). As with the other parameters, these two parameters work with the memory real clock (which is half of the memory labeled clock). The lower these parameters, the faster the memory will be.

  • Active to Precharge Delay (tRAS): After an Active command is issued, another Precharge command cannot be issued until tRAS has elapsed. So, this parameter limits when the memory can start reading (or writing) a different row.
  • Command Rate (CMD): It is the time taken by the memory chip from being activated (through its CS – Chip Select – pin) and when any command can be issued to the memory. This parameter carries the letter “T” with it. Possible values are 1T or 2T, meaning one clock cycle or two clock cycles, respectively.
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目录
  • CAS Latency (CL) Impact on RAM Speed
  • RAS to CAS Delay (tRCD) Impact on RAM Speed
  • RAS Precharge (tRP) Impact on RAM Speed
  • Other Parameters Impacting RAM Timings
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